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 DDU8C
5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU8C)
FEATURES
* * * * * * Five equally spaced outputs Fits standard 8-pin DIP socket Low profile Auto-insertable Input & outputs fully CMOS interfaced & buffered 10 T2L fan-out capability
IN T2 T4 GND 1 2 3 4 8 7 6 5
data 3 (R) delay devices, inc.
PACKAGES
VDD T1 T3 T5
IN N/C N/C T2 N/C T4 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD N/C T1 N/C T3 N/C T5
DDU8C-xx DDU8C-xxA1 DDU8C-xxB1 DDU8C-xxM
DIP Gull-Wing J-Lead Military DIP
Military SMD DDU8C-XXMD1 DDU8C-xxMD4
FUNCTIONAL DESCRIPTION
The DDU8C-series device is a 5-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an amount determined by the device dash number (See Table). The total delay of the line is measured from IN to T5. The nominal tap-to-tap delay increment is given by one-fifth of the total delay.
PIN DESCRIPTIONS
IN T1-T5 VDD GND Signal Input Tap Outputs +5 Volts Ground
SERIES SPECIFICATIONS
* * * * * * Minimum input pulse width: 40% of total delay Output rise time: 8ns typical Supply voltage: 5VDC 5% Supply current: ICCL = 40a typical ICCH = 10ma typical Operating temperature: 0 to 70 C Temp. coefficient of total delay: 300 PPM/C
DASH NUMBER SPECIFICATIONS
Part Number DDU8C-5050 DDU8C-5060 DDU8C-5075 DDU8C-5100 DDU8C-5125 DDU8C-5150 DDU8C-5175 DDU8C-5200 DDU8C-5250 Total Delay (ns) 50 2.5 60 3.0 75 4.0 100 5.0 125 6.5 150 7.5 175 8.0 200 10.0 250 12.5 Delay Per Tap (ns) 10.0 3.0 12.0 3.0 15.0 3.0 20.0 3.0 25.0 3.0 30.0 3.0 35.0 4.0 40.0 4.0 50.0 5.0
NOTE: Any dash number between 5004 and 5250 not shown is also available.
20%
20%
20%
20%
20%
VDD IN
T1
T2
T3
T4
T5 GND
DDU8C Functional diagram
(c)1997 Data Delay Devices
Doc #97013
1/28/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU8C
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU8C tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 40% of the total delay and periods as small as 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data Delay Devices if your application requires device testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU8C relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VDD to GND, located as close as possible to the VDD pin, is recommended. A wide VDD trace and a clean ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VDD VIN TSTRG TLEAD MIN -0.3 -0.3 -55 MAX 7.0 VDD+0.3 150 300 UNITS V V C C NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V) PARAMETER High Level Output Voltage Low Level Output Voltage High Level Output Current Low Level Output Current High Level Input Voltage Low Level Input Voltage Input Current SYMBOL VOH VOL IOH IOL VIH VIL IIH MIN 3.98 TYP 4.4 0.15 MAX UNITS V V mA mA V V A NOTES VDD = 5.0, IOH = MAX VIH = MIN, VIL = MAX VDD = 5.0, IOL = MAX VIH = MIN, VIL = MAX
0.26 -4.0 4.0
3.15 1.35 0.10
VDD = 5.0
Doc #97013
1/28/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
DDU8C
PACKAGE DIMENSIONS
8 7 6 5
Lead Material: Nickel-Iron alloy 42 TIN PLATE
8 1 2 3 4 7 6 5
.440 MAX. .280 MAX. .290 MAX.
1 2 3 4
.500 MAX.
.500 MAX.
.015 TYP. .010.002 .018 TYP. .070 MAX. .300.010 3 Equal spaces each .100.010 Non-Accumulative .350 MAX. .300 TYP.
.020 .290 TYP. MAX. .180 TYP. .020 TYP.
.010 TYP. .300 TYP.
DDU8C-xx (Commercial DIP)
DDU8C-xxM (Military DIP)
.020 TYP.
8 7 6 5
.040 TYP. .270 TYP.
1 2 3 4
.010 TYP.
.020 TYP.
8 7 6 5
.040 TYP. .270 TYP.
1 2 3 4
.050 TYP. .320 TYP.
.430 TYP.
.100 .300 .520 MAX.
.110
.300 MAX.
.050 TYP.
.100 .300 .520 MAX.
.110
.350 MAX.
.110 TYP.
DDU8C-xxA1 (Commercial Gull-Wing)
DDU8C-xxB1 (Commercial J-Lead)
.650 .100
1 14
.017 .510 MAX.
.100
1 14
.017 .510 MAX.
.300 TYP.
7 8
.300 TYP.
7 8
.100 .300 .200 MAX. (Com) .225 MAX. (Mil) .065 TYP. .360 TYP. .065 TYP. .510 MAX. .300
.050
.100 .080 .008 .200 MAX. (Com) .225 MAX. (Mil) .005 .510 MAX.
.050 .080
.025
.008
.045
.360 TYP. .065 TYP. .065 TYP.
DDU8C-xxD1 (Commercial SMD) DDU8C-XXMD1 (Military SMD)
Doc #97013
1/28/97
DDU8C-xxD4 (Commercial SMD) DDU8C-xxMD4 (Military SMD)
3
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
DDU8C
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: Ambient Temperature: 25oC 3oC Supply Voltage (VDD): 5.0V 0.1V Input Pulse: High = 5.0V 0.1V Low = 0.0V 0.1V Source Impedance: 50 Max. Rise/Fall Time: 5.0 ns Max. (measured between 0.5V and 4.5V ) Pulse Width: PWIN = 1.5 x Total Delay Period: PERIN = 10 x Total Delay OUTPUT: Load: Cload: Threshold: 1 FAST-TTL Gate 5pf 10% 2.5V (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER SYSTEM
PRINTER
REF PULSE GENERATOR OUT TRIG IN DEVICE UNDER TEST (DUT) T1 T2 T3 T4 T5 IN TRIG TIME INTERVAL COUNTER
Test Setup
PERIN PWIN TRISE INPUT SIGNAL
4.5V 2.5V 0.5V
TFALL VIH
4.5V 2.5V 0.5V
VIL TFALL
TRISE OUTPUT SIGNAL VOH
2.5V
2.5V
VOL
Timing Diagram For Testing
Doc #97013
1/28/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
4


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